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딥엑스 · 기타 개발

  • 온디바이스 AI 반도체·NPU

[HW] SoC Physical Design Engineer

대한민국 경기도 성남시 판교역로241번길 20 미래에셋벤처타워 5층공식 채용 공고

Python

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기타 개발 · 필수 · 경력 10년 이상

주요 업무
  • Perform RTL-to-GDSII Physical Design (Synthesis, Place & Route, Timing Closure)
  • Conduct low-power design and power optimization
  • Run physical verification (DRC, LVS, ERC, etc.) and signal integrity checks (SI, IR Drop, EM analysis)
  • Optimize PPA (Power, Performance, Area)Develop and automate
주요 업무 1개 더 보기
자격 요건
  • Bachelor’s degree or higher in Electrical Engineering, Computer Engineering, or related field
  • 10+ years of experience in ASIC Physical Design (relevant project experience for new graduates will be considered)
  • Proficiency with EDA tools such as Synopsys or Cadence (Design Compiler, ICC2, Innovus, etc.)
  • Understanding of STA (Static Timing Analysis) and Low Power Design Methodologies
자격 요건 2개 더 보기
우대 사항
  • Hands-on experience with 7nm or below advanced process technologies
  • Experience in high-performance or low-power chip design
  • Familiarity with scripting languages (Python, Perl, TCL, etc.) for automation
  • Tape-out experience
우대 사항 6개 더 보기
근무·전형
  • Full-time (3-month probationary period with 100% compensation)
  • Application Review - (Phone Interview) - Technical Interview - Organizational Culture Fit Interview - CEO Interview - Reference Check / Compensation Discussion
  • The recruitment process may vary depending on the position and application content.
  • Candidates with less than 3 years of experience are required to submit their academic transcripts.
근무·전형 1개 더 보기

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그 밖의 경력 조건

  • 필수□ 10+ years of experience in ASIC Physical Design (relevant project experience for new graduates will be considered)

딥엑스, 어떤 회사일까요?

  • 온디바이스 AI 반도체·NPU

온디바이스 AI를 위한 NPU와 소프트웨어를 만드는 딥엑스입니다. 판교 본사와 기술 방향을 공식 페이지에서 확인했고 법인 설립·투자 연혁은 회사 소개 전재 자료로 보강했습니다.

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포지션 소개 · 공고 전문 읽기

Frontier of ​On-device ​AI ​Semiconductors

for Everyone, ​Everywhere

About DeepX ​Co., ​Ltd.

DEEPX ​is a ​forward-thinking Series D startup ​architecting ​the infrastructure ​for the Physical ​AI era. ​

By ​delivering the ​world’s ​most ​energy-efficient NPU technology, ​we ​are solving the ​critical ​power ​and heat challenges ​of Generative ​AI ​to bring ​super-intelligence to ​every ​device, everywhere.

Our global ​leadership is ​validated by our record-breaking recognition as a multi-year CES Innovation Award honoree (2024 & 2026) and being named the 2024 Frost & Sullivan Company of the Year in the NPU sector. With an enterprise value approaching 1 trillion KRW, DEEPX offers a unique pre-IPO

opportunity to join a market leader defining the new industry standard for the $70B AI semiconductor market.

We are currently scaling toward mass production of our flagship DX-M1 (Samsung 5nm) with over 50 global projects scheduled, while engineering next-generation 2nm solutions to support 100B parameter Large Language Models (LLM) at the edge. ☞ Link

★ If you want to be part of world-class innovation? Please talk with us.

★Explore our journey: The DEEPX White Paper ☞ Link

Responsibilities

□ Perform RTL-to-GDSII Physical Design (Synthesis, Place & Route, Timing Closure)

□ Conduct low-power design and power optimization

□ Run physical verification (DRC, LVS, ERC, etc.) and signal integrity checks (SI, IR Drop, EM analysis)

□ Optimize PPA (Power, Performance, Area)Develop and automate

□ Physical Design flows for advanced process technologies

Qualifications

□ Bachelor’s degree or higher in Electrical Engineering, Computer Engineering, or related field

□ 10+ years of experience in ASIC Physical Design (relevant project experience for new graduates will be considered)

□ Proficiency with EDA tools such as Synopsys or Cadence (Design Compiler, ICC2, Innovus, etc.)

□ Understanding of STA (Static Timing Analysis) and Low Power Design Methodologies

□ In-depth knowledge of DFM (Design For Manufacturing) rules and its application in physical design

□ Strong communication and problem-solving skills

Preferred Qualifications

□ Hands-on experience with 7nm or below advanced process technologies

□ Experience in high-performance or low-power chip design

□ Familiarity with scripting languages (Python, Perl, TCL, etc.) for automation

□ Tape-out experience

□ Motivation to work in a startup environment and experience with global collaboration

Recruitment Process

□ Application Review - (Phone Interview) - Technical Interview - Organizational Culture Fit Interview - CEO Interview - Reference Check / Compensation Discussion

※ The recruitment process may vary depending on the position and application content.

※ Candidates with less than 3 years of experience are required to submit their academic transcripts.

Employment Type

□ Full-time (3-month probationary period with 100% compensation)

Working Hours

□ Monday to Friday, 9:00 AM – 6:00 PM (Lunch break: 12:00 PM – 1:00 PM)

Notes

□ If any false information is found in the application or onboarding documents, the job offer may be withdrawn even after confirmation.

□ A 3-month probationary period applies after joining, with no reduction in salary or benefits.

Benefits

□ 모든 정규직 입사자에게 연봉 수준의 스톡옵션 부여

□ 최신 사양 장비 및 최고의 근무 환경 제공 (최신 노트북, 높낮이 조절식 스탠딩 데스크, 모니터암, 듀얼모니터 등 제공)

□ 점심식사 + 아침 & 저녁식사 지원

□ 스낵, 아이스크림, 음료 등 사내 카페 무제한 간식 제공

□ 사우나가 포함된 피트니스 비용 지원

□ 연 1회 종합건강검진 지원 (배우자 포함)

□ 생일, 결혼기념일, 크리스마스이브 축하금 지급 및 조기퇴근 제공

□ 설/추석 명절 상여금 지급

□ 축하와 위로를 위한 경조휴가 및 경조금 지원

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